A method of reduction of the microinstructions of synchronous digital systems

TitleA method of reduction of the microinstructions of synchronous digital systems
Publication TypeJournal Article
Year of Publication2007
AuthorsAl-Dahleh, MZ, Shehabat, IM
JournalJournal of Digital Information Management
Volume5
Issue6
Pagination368 - 371
Date Published2007
KeywordsCombined addressing, Digital systems, Microinstruction (MI), Synchronized systems, Throughput
Abstract

In this paper, the author presents a method to synthesize the Algorithm State Machines (ASM) for synchronous digital systems using Combined Addressing. In This proposed method, the microinstructions are divided into subsets, and thus the Numbers of microinstructions are apparently minimized and the throughput time of the automation is reduced.

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