The design and implementation of the digital down converter based on the improved dds and dspbuilder techniques

DDC (Digital Down Converter), as a key part of digital receivers, aims to get low-speed digital baseband signals by extracting and filtering the digital signals transformed by high-speed ADC (Analog Digital Conversion). This paper employs the multi-rate process technique to design the DDC, i.e. firstly conducting data CIC (Cascade Integrator Comb) extraction, then HBF (Half-Band Filtering) and at last low pass filtering. CIC, which doesn't need multiplication, can realize high speed filtering and the HBF has high operation efficiency and good realtime performance. FPGA realization is taken into full consideration during the project design of the top. In the end, this paper adopts the Simulink instrument in MATLAB and combines Altera's signal processing toolbox-DSPBuilder to implement the design scheme by the FPGA. It focuses on the description of FPGA implementation of the digitally controlled oscillator, CIC filter, half-band extracting filter and the low pass filter.